Logo Questions Linux Laravel Mysql Ubuntu Git Menu
 

volatile vs memory barrier for interrupts

Tags:

Let x and y be variables that are shared between main code and interrupt code.

My idea of volatile is that it is only and always needed for hardware variables and interrupt variables that are also used in main code.

Every usage of x and y in the main code is guaranteed to be atomic by disabling interrupts.

Do x and y really need to be volatile, or is it enough to put a memory barrier before using them to force reloading the variables from RAM?

A)

volatile bool x;
volatile int y[100];

int main(void)
{

        while (true) {
                disable_interrupts();
                if (x)
                        work(y);
                x = false;
                enable_interrupts();
        }
}

B)

bool x;
int y[100];

int main(void)
{

        while (true) {
                memory_barrier();
                disable_interrupts();
                if (x)
                        work(y);
                x = false;
                enable_interrupts();
        }
}

The objectives are:

  • To let the compiler optimize work().

  • Be able to use standard library functions such as memcpy() (those aren't made to be used with volatile variables).

Edit: add interrupt example

interrupts.c:

extern volatile? int x;
extern volatile? int y;

void interrupt(void)
{

        x = true;
        REGY1 = y[7];
        y[23] = REGY2;
}
like image 862
alx Avatar asked Jun 27 '19 12:06

alx


People also ask

Is volatile a memory barrier?

The keyword volatile does not guarantee a memory barrier to enforce cache-consistency. Therefore, the use of volatile alone is not sufficient to use a variable for inter-thread communication on all systems and processors.

How do memory barriers work?

The memory barrier instructions halt execution of the application code until a memory write of an instruction has finished executing. They are used to ensure that a critical section of code has been completed before continuing execution of the application code.

What is write memory barrier?

A write memory barrier gives a guarantee that all the STORE operations specified before the barrier will appear to happen before all the STORE operations specified after the barrier with respect to the other components of the system.

What is memory barrier in Java?

Memory barriers, or fences, are a set of processor instructions used to apply ordering limitations on memory operations.


1 Answers

Memory barriers instead of volatile are fine. Linux kernel developers prefer it that way

There are a few things to watch out for.

  • Move the barrier after disabling interrupts. Interrupts tend to happen at the worst times.
  • You need a second memory barrier before enabling interrupts, for variables that are written in the main program, and read in the interupt handler.
  • Disabling interrupts is not enough in a multiprocessor/multicore system, it doesn't prevent another core from running.
  • Needless to say, interrupts should not be disabled for extended periods of time, as it can prevent some hardware drivers from functioning.
like image 186
followed Monica to Codidact Avatar answered Nov 15 '22 06:11

followed Monica to Codidact