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Hadi Brais
Hadi Brais has asked
7
questions and find answers to
213
problems.
Stats
4.5k
EtPoint
1.3k
Vote count
7
questions
213
answers
About
Email:
[email protected]
Hadi Brais questions
How does perf use the offcore events?
Is it possible for the RESOURCE_STALLS.RS event to occur even when the RS is not completely full?
Why are the user-mode L1 store miss events only counted when there is a store initialization loop?
Why does the number of uops per iteration increase with the stride of streaming loads?
Hadi Brais answers
checking memory access x86-64 assembly
Can an x86 CPU read the value of any register while in user mode?
What is the gcc cpu-type that includes support for RDTSCP?
Run a program without cache
Temporal locality in memory mountain
What is the meaning of IB read, IB write, OB read and OB write. They came as output of Intel® PCM while monitoring PCIe bandwidth
Understanding Amdahl's law
How does kernel know physical memory base address?
PMC to count if software prefetch hit L1 cache
Temporality of ST64B and MOVDIR64B
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