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Alex
Alex has asked
123
questions and find answers to
12
problems.
Stats
915
EtPoint
113
Vote count
123
questions
12
answers
About
Alex questions
Do atomic CAS-operations on x86_64 and ARM always use std::memory_order_seq_cst?
What is the difference between cudaMemcpy() and cudaMemcpyPeer() for P2P-copy?
Is there any sense to use autoencoder for network with batch normalization?
Are GPU Kepler CC3.0 processors not only pipelined architecture, but also superscalar? [closed]
What is the maximum length of the cable can be for infiniband(RDMA)?
Can 1 CUDA-core to process more than 1 float-point-instruction per clock (Maxwell)?
How do I discover the PCIe bus topology and slot numbers on the board?
Why does the C++ compiler makes it possible to declare a function as constexpr, which can not be constexpr?
Why do we need to use folly::fbvector instead of std::vector with allocator which reserve large uncommited area initially?
Can we use `shuffle()` instruction for reg-to-reg data-exchange between items (threads) in WaveFront?
Alex answers
should I label and train on all objects that exist in the training set (yolo darknet)
Concatenating template parameter packs for a unary argument
Does the semantics of `std::memory_order_acquire` requires processor instructions on x86/x86_64?
Does atomic_thread_fence(memory_order_seq_cst) have the semantics of a full memory barrier?
Can x86 reorder a narrow store with a wider load that fully contains it?
Does standard C++11 guarantee that memory_order_seq_cst prevents StoreLoad reordering of non-atomic around an atomic?
When are x86 LFENCE, SFENCE and MFENCE instructions required?
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