I would like to swap two variables. and i would like to do it through the pipeline using a Read After Write hazard to my advantage.
Pipeline:
OPERXXXXXX FetchXXXXX DecodeXXXX ExecuteXXX WriteBkXXX
STORE X, Y ---------- ---------- ---------- ----------
STORE Y, X STORE X, Y ---------- ---------- ----------
---------- STORE Y, X STORE X, Y ---------- ----------
---------- ---------- STORE Y, X STORE X, Y ----------
---------- ---------- ---------- STORE Y, X STORE X, Y
---------- ---------- ---------- ---------- STORE Y, X
how do i go about telling the compiler to do that (and exactly that) without automatic locks and warning flags? can you suggest any literature/keywords?
specs:
-> target: modern architectures which support multistation (more than 4) pipelining
-> this is not related to any particular 'problem'. just for the sake of science.
current hurdles:
I suggest that you read the first parts of Intel's optimization manual. Then you will realize that a modern, out-of-order, speculative CPU does not even respect your assembly language. Manipulating pipeline to your advantage? Based on this document, I'd say -- forget it.
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