specifying the filename in a makefile

Question

I'm new to this and trying to create a makefile where I could, for example, run:

make -f mymakefile testfile

and the makefile would find testfile.java (which exists in the directory I'm running from), compile it, and run the code.

Instead, I must be confused with how automatic variables work and after working all afternoon I still get the error:

make: Nothing to be done for `testfile'.

Any help would be appreciated and my code is below:

JC=javac
JVM=java
JFLAGS= -g
RM = rm -f
CFLAGS =
CXX = gcc
NAME = *
.SUFFIXES: .java .class

all: run

NAME: 
        $(CXX) $(CFLAGS) -o $^ $@
        echo $(NAME)

$(NAME).class: $(NAME)
        $(JC) $(JFLAGS) $(NAME).java

run: $(NAME).class
        $(JVM) $(NAME)

.PHONY: clean
clean:
        $(RM) $(NAME).class

I've tried just having it echo 'testfile' to better understand how automatic variables work, but I couldn't get that to work correctly either.

Answer 1

The arguments on the make command line select the targets to build. You can't pass values to variables in the same way you would with a shell script (like you're trying to do with "NAME".)

If you really want to pass a value for a variable, the command would be:

NAME=testfile make -f mymakefile