Relationship between number of logic cells on an FPGA and performance

Question

Hey so I have a question about FPGA's. If you look at the current lineup of xilinx products, specifically the 7 series, there is a massive price differential between each of the models. What I don't understand is if I could buy an Artix-7 with ~200k logic cells for $300 whereas a Virtex-7 with ~2000k logic cells costs in excess of $20,000. So could I just buy 10 Artix-7's and get the same performance? Furthermore is performance linearly related to the number of logic cells, and if not then how are they related? Is there any advantage to having more logic cells per core? I'm sure it depends on what you are doing but as my interest in the matter, although theoretical, lies in cryptograpic applications, my question relates specifically to implementations of the MD5, SHA-0/1/2/3, and similar encryption algorithms.

Answer 1

An FPGA doesn't have "performance" like a processor. It just has a bunch of logic elements (LEs) that you can use. If a high-end part has 2MLEs and a low-end part has 200kLEs, but you only need 20kLEs for your processing core, it makes little difference which one you use, all else being equal. Of course, if you have a problem that can easily be parallelized, then you can turn those extra LEs into extra performance by building more processing cores. But that's up to you to do.

Now, all else is not always equal, because there's a lot more to an FPGA than simply the number of logic cells. I can't speak for Xilinx parts (I work for another major FPGA vendor) but typically the high-end families will have things like very high-speed transceivers that the midrange and low-end families do not. In addition, sometimes they have different mixes of embedded RAM, DSP, etc.

So, can you use a bunch of small FPGAs instead of a large one? Remember that an FPGA will only have about 1000-2000 IOs, whereas there will be more like 100Ks of internal wires between the corresponding parts of the higher-end part. So not only will you have to build a pretty complicated board, you might find yourself IO-limited in getting signals off of one chip and onto another.