read CPU cache contents

Question

Is there any way to read the CPU cache contents? Architecture is for ARM.

I m invalidating a range of addresses and then want to make sure whether it is invalidated or not. Although I can do read and write of the range of addresses with and without invalidating and checking the invalidation, I want to know whether it is possible to read the cache contents

Thanks!!

Answer 1

ARM9 provides cache manipulation and test registers that allow you to examine the state of the cache. Here's a reasonable starting point:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0151c/Chdcfejb.html

The ICache and DCache are maintained using MCR and MRC instructions to CP15 registers 7 and 9, defined by the ARM v4T programmer’s model. Additional operations are available using MCR and MRC to CP15 register 15. These operations are combined with those using registers 7 and 9 to enable testing of the caches entirely in software.

These are privileged instructions so they may not be accessible on your target platform.

I'd start with a simple program that dumps the state of all the cache lines. That should give you enough information to read the data in the cache simply by reading the memory locations the cache tags provide.