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I'm testing a proect, and due to testing purposes, it must include a Makefile, and the first test command will be 'make'. However I don't need the makefile to do anything. The problem is that if I leave it empty, it prints a line in the shell:
make: *** No targets. Stop.
I need it to not print anything when called in the shell - not even an empty line (again, due to tests format which I don't control). Is that possible?
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A simple makefile consists of "rules" with the following shape: target ... : dependencies ... command ... ... A target is usually the name of a file that is generated by a program; examples of targets are executable or object files.
Makefile sets a set of rules to determine which parts of a program need to be recompile, and issues command to recompile them. Makefile is a way of automating software building procedure and other complex tasks with dependencies. Makefile contains: dependency rules, macros and suffix(or implicit) rules.
Make is Unix utility that is designed to start execution of a makefile. A makefile is a special file, containing shell commands, that you create and name makefile (or Makefile depending upon the system).
If you define an empty target
Nothing:
the make command will tell
$ make
make: Nothing to be done for 'Nothing'.
Then, just add a .SILENT target
# A makefile
Nothing:
all: twist again
.SILENT:
See link GNU Make silent by default
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