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I want a pattern rule with dependencies constructed both from the stem and using wildcards, i.e. something like
$(FILES): %.o: %.c $(wildcard %*.c)
This doesn't seem to work: the stem % is not expanded within the wildcard function (see http://www.gnu.org/software/make/manual/html_node/Pattern-Rules.html), while the automatic variable $* seems not to be recognized when listing dependencies.
Is there a (not too kludgy) way of doing something like this?
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A pattern rule looks like an ordinary rule, except that its target contains the character ' % ' (exactly one of them). The target is considered a pattern for matching file names; the ' % ' can match any nonempty substring, while other characters match only themselves.
The $@ and $< are called automatic variables. The variable $@ represents the name of the target and $< represents the first prerequisite required to create the output file.
There can only be one recipe to be executed for a file. If more than one rule gives a recipe for the same file, make uses the last one given and prints an error message. (As a special case, if the file's name begins with a dot, no error message is printed.
If you want to do wildcard expansion in such places, you need to use the wildcard function, like this: $(wildcard pattern ...) This string, used anywhere in a makefile, is replaced by a space-separated list of names of existing files that match one of the given file name patterns.
As is stated in section 10.5.3 of the GNU make manual, automatic variables (which is what $* is) are not available in prerequisites, but it also refers to a work-around, namely secondary expansion.
If I understand it (and you) correctly, something like this should do what you want:
.SECONDEXPANSION: $(FILES): %.o: %.c $$(wildcard $$**.c)
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