Given a master.makefile
calling a sub-makefile such :
downloads:
make -f downloads.makefile
And a sub-makefile downloads.makefile
such :
download: clean
curl -o ./data/<itemname>.png 'http://www.mysite.com/<itemname>.png'
echo "downloaded <itemname>: Done!"
How to set a global variable itemname
in my masterfile, available to my sub-makefile ?
Note: My project is actually more complex, with 12 different sub-makefile, which should reuse the same parameters/variable from the master file. The masterfile should assign the value, while the sub-makefile should retrive the variable's value where I put <itemname>
.
Variable values of the top-level make can be passed to the sub- make through the environment by explicit request. These variables are defined in the sub- make as defaults, but they do not override variables defined in the makefile used by the sub- make unless you use the ' -e ' switch (see Summary of Options).
There is one way that the makefile can change a variable that you have overridden. This is to use the override directive, which is a line that looks like this: ' override variable = value ' (see The override Directive).
The file name of the target of the rule. If the target is an archive member, then ' $@ ' is the name of the archive file. In a pattern rule that has multiple targets (see Introduction to Pattern Rules), ' $@ ' is the name of whichever target caused the rule's recipe to be run.
There are various ways to do it.
First, always, always use $(MAKE)
and never make
when running a sub-make. Then...
1. You can pass the value on the recursive command line:
itemname = whatever
downloads:
$(MAKE) -f downloads.makefile itemname=$(itemname)
2. You can export the variable in the parent makefile:
export itemname = myvalue
downloads:
$(MAKE) -f downloads.makefile
with sub-makefile such :
download:
echo "downloaded $(itemname): Done!"
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