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Makefile conditional include

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I'm trying to write an application that needs either ALSA or OSS headers. Basically, I want to pass a define to the compiler if /etc/oss.conf does not exist, since that probably means the soundcard.h header doesn't exist (feel free to correct me on that one, I'm still new to working with OSS). Per the OSS documentation, you would use the include directive like so:

include /etc/oss.conf CFLAGS := -I$(OSSLIBDIR)/include/sys 

One problem. OSS support is optional, so I'd want to check if the header exists, and if does, pass a define to the compiler. The problem is, AFAIK there is no way to check if a file exists outside of a makefile rule. Inside the rule, if I use an if statement, for some reason, trying to set CFLAGS doesn't alter it:

test: $(objects)     @if [ -f ${OSS_CONFIG} ]; then \     . ${OSS_CONFIG}; \     CFLAGS+=" -I${OSSLIBDIR} -DUSE_OSS"; \     fi     @echo ${CFLAGS} 

(The above just outputs the original value of CFLAGS, even if ${OSS_CONFIG} exists.) This is, of course, extremely ugly, and I'm wondering if there's a cleaner way to do it. Or is the way I'm going about this going to trigger a worldwide cataclysmic event involving the genocide of kittens?

Oh, and please don't tell me to use autoconf.

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dav Avatar asked Oct 11 '10 21:10

dav


People also ask

What is include in Makefile?

The include directive tells make to suspend reading the current makefile and read one or more other makefiles before continuing. The directive is a line in the makefile that looks like this: include filenames ... filenames can contain shell file name patterns.

What does Ifneq mean in Makefile?

The ifneq directive begins the conditional, and specifies the condition. It contains two arguments, separated by a comma and surrounded by parentheses. Variable substitution is performed on both arguments and then they are compared.

What is := in Makefile?

Expanded assignment = defines a recursively-expanded variable. := defines a simply-expanded variable.


1 Answers

One suggest: use -include (then it won't warn + quit on failure). I don't know if I ever quite got this syntax to work myself, though.

Another hack could be something along the lines of: DUMMY_VAR := $(shell ... ) to execute arbitrary code. I think this is even less likely to work.

Other than that, I don' think this is possible. When I looked into a similar problem recently, I found that I can't get make to run arbitrary shell commands during the makefile creation process.

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Alex Reece Avatar answered Sep 27 '22 19:09

Alex Reece