LLVM Instruction Scheduling

Question

As is noted in Getting Started with LLVM Core Libraries there are three distinct instruction schedulers in the LLVM backend. One of them runs before register allocation and it can be selected using the -pre-RA-sched option. The other two run after register allocation. How can I choose or disable each of these three schedulers? Do they have any interferences which each other?

Answer 1

See llc --help-hidden for more details. Here are three options corresponding to the pre-RA SDNode, pre-RA MI and post-RA MI scheduling.

 -pre-RA-sched        - Instruction schedulers available (before register allocation):
 -enable-misched      - Enable the machine instruction scheduling pass.
 -enable-post-misched - Enable the post-ra machine instruction scheduling pass.

You can select exactly which scheduler to be used in pre-RA SDNode scheduling, but not for the others.