I am reading up the following article about the new Clock Framework present in the Linux Kernel..
http://lwn.net/Articles/489668/
Thanks,
~vj
Clocks may need PLLs to be set up and locked, voltage OPP to be set, or other prerequisite actions before clk_enable. For example: drivers/clk/clk-highbank.c clk_pll_prepare()
This routine has wait loops that spin until the hardware PLL shows lock. Can't do that from an atomic context. Another LWN article speaks a bit to the prepare() vs enable() separation.
PLL and clock details are specific to the processor / SoC in question. Block diagrams would show clock tree of SoC input pins leading to various PLLs, then various clocks driven from each PLL (may also have power domains that can be turned on/off), and clocks individually enabled once the "prepare" is done. Long story, but I hope the above may be helpful.
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