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New posts in x86

Accessing a register without using inline assembly with gcc

c gcc x86 inline-assembly

Is it valid to write below ESP?

windows assembly x86 abi stack-pointer

What are the segment and offset in real mode memory addressing?

assembly x86 x86-16 real-mode memory-segmentation

The relation between privileged instructions, traps and system calls

operating-system x86 virtualization computer-architecture

Anyone knows what "mov edi,edi " does?

assembly visual-c++ x86 mov hotpatching

Where is the Write-Combining Buffer located? x86

x86 intel cpu-architecture cpu-cache amd-processor

How to get c code to execute hex machine code?

c assembly x86 x86-64 shellcode

Endianness inside CPU registers

x86 cpu-registers endianness

Can branch prediction crash my program?

assembly computer-architecture x86 branch-prediction

Intel CPUs Instruction Queue provides static branch prediction?

performance assembly x86 cpu-architecture branch-prediction

Addressing Modes in Assembly Language (IA-32 NASM)

assembly x86 nasm addressing-mode

How to power down the computer from a freestanding environment?

c assembly operating-system x86 system-shutdown

How to use a logical address with an FS or GS base in gdb?

gdb x86 memory-segmentation

Floating Point Program gives Invalid Result

assembly floating-point x86 masm irvine32

Difference between dts and ACPI

linux x86 linux-device-driver device-tree acpi intel

x86 assembly programming loops with ecx and loop instruction versus jmp + j<condition>

loops assembly x86

What's the point of the VPERMILPS instruction (_mm_permute_ps)?

assembly x86 avx instruction-set

mov eax, large fs:30h

debugging assembly x86 ida mov

SIMD instructions for floating point equality comparison (with NaN == NaN)

assembly floating-point x86 x86-64 simd intel

Intel Intrinsics guide - Latency and Throughput

performance x86 intel sse intrinsics
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