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New posts in sse
SSE reduction of float vector
Jan 28, 2018
c++
sum
sse
simd
reduction
How to force gcc to use all SSE (or AVX) registers?
Nov 10, 2022
gcc
64-bit
sse
register-allocation
avx
SSE code to set float variable to 0.0f or 1.0f based on comparison
Feb 27, 2019
c
performance
optimization
sse
simd
SSE slower than FPU?
Dec 22, 2021
c++
optimization
sse
vectorization
simd
Non-temporal loads and the hardware prefetcher, do they work together?
Mar 15, 2022
performance
x86
sse
cpu-cache
prefetch
C - How to access elements of vector using GCC SSE vector extension
Jun 07, 2022
gcc
sse
Parallel programming using Haswell architecture [closed]
Apr 12, 2015
sse
cpu-architecture
avx
avx2
How much speed-up from converting 3D maths to SSE or other SIMD?
Aug 12, 2022
optimization
x86
native
sse
simd
intel
What might cause the same SSE code to run a few times slower in the same function?
Mar 09, 2022
c++
optimization
intel
sse
intel-vtune
Stack alignment on x86
Sep 25, 2022
linux
gcc
x86
sse
How to multiply two quaternions with minimal instructions?
Nov 04, 2022
c
assembly
sse
multiplication
quaternions
SIMD optimization of cvtColor using ARM NEON intrinsics
Apr 10, 2022
c++
opencv
arm
sse
neon
SSE vectorization of math 'pow' function gcc
Aug 29, 2021
c
optimization
loops
sse
vectorization
How do declare a memory range as uncacheable using gcc on x86 platform?
Apr 22, 2022
gcc
assembly
x86
sse
How can I add together two SSE registers
Oct 04, 2022
c++
c
intel
sse
avx2
SSE2: Double precision log function
Mar 21, 2022
c++
c
optimization
sse
simd
Check XMM register for all zeroes
Nov 03, 2022
c++
sse
simd
intrinsics
Vectorizing Dot Product Calculation using SSE4
Apr 24, 2014
c
performance
sse
dot-product
How to efficiently combine comparisons in SSE?
May 06, 2021
c
optimization
assembly
sse
avx
Do all CPUs which support AVX2 also support SSE4.2 and AVX?
Nov 13, 2022
sse
simd
avx
avx2
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