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New posts in sse

SSE instruction to sum 32 bit integers to 64 bit

sse simd

How to make premultiplied alpha function faster using SIMD instructions?

c++ x86 sse simd avx

C/C++ usage of special CPU features

c++ sse mmx

SIMD (AVX) compare

c gcc sse simd

128-bit SSE counter?

optimization sse intrinsics avx

Minimum of 4 SP values in __m128

c sse simd

Compiling SSE intrinsics in GCC gives an error

gcc x86 intel sse simd

Is there a good way of finding modulus of two variables using SSE? (without SVML)

c++ sse

Move quadword between xmm and general-purpose register in ml64?

assembly x86-64 masm sse gnu-assembler

AVX2, How to Efficiently Load Four Integers to Even Indices of a 256 Bit Register and Copy to Odd Indices?

x86 sse simd avx avx2

SSE and iostream: wrong output for floating point types

c++ floating-point x86-64 sse libstdc++

SSE intrinsics cause normal float operation to return -1.#INV

c++ sse intrinsics

Why does _mm_stream_ps produce L1/LL cache misses?

c performance caching gcc sse

Where does the SSE instructions outperform normal instructions

c x86-64 sse

What is the difference between MOVDQA and MOVNTDQA, and VMOVDQA and VMOVNTDQ for WB/WC marked region?

assembly x86 sse simd avx

Visual Studio 2017: _mm_load_ps often compiled to movups

c++ assembly sse intrinsics visual-studio-2017

How do you move 128-bit values between XMM registers?

assembly simd sse

Use both SSE2 intrinsics and gcc inline assembler

gcc sse inline-assembly intrinsics

SSE3 intrinsics: How to find the maximum of a large array of floats

c++ sse intrinsics

Setting __m256i to the value of two __m128i values

c sse simd avx
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