Logo Questions Linux Laravel Mysql Ubuntu Git Menu
HTML CSS JAVASCRIPT SQL PYTHON PHP BOOTSTRAP JAVA JQUERY R React Kotlin
 

New posts in micro-optimization

Is the fall-through side of a conditional branch more efficient? Is it a good idea to make that the error-handling side?

assembly optimization x86 micro-optimization

Efficient UTF-8 character-length decoding for a non-zero character in a 32 bit register

assembly utf-8 nasm x86-64 micro-optimization

Advantage of using LEA over MOV for passing parameters in Assembly compiled from C++

c++ assembly visual-c++ x86-64 micro-optimization

Is there a faster algorithm for max(ctz(x), ctz(y))?

c++ algorithm rust bit-manipulation micro-optimization

repz ret: why all the hassle?

assembly x86 micro-optimization amd-processor branch-prediction

Why _umul128 works slower than scalar code for mul128x64x2 function?

c++ x86 simd avx micro-optimization

How to implement the totalOrder predicate for floating point values?

assembly floating-point x86-64 ieee-754 micro-optimization

ARM Cortex M0+: How to use "Branch if Carry" instructions in C-code?

c assembly arm compiler-optimization micro-optimization

can array access be optimized?

java arrays optimization micro-optimization

x86 Assembly pushad/popad, How fast it is?

performance assembly x86 inline-assembly micro-optimization

Optimize nested loops for pattern-filling an array, to help the compiler produce efficient ARM assembly?

c assembly arm micro-optimization

Why this unnecessary MOVAPD copy in gcc 9.1, in a tiny function

assembly gcc x86-64 sse micro-optimization

x86 opcode alignment references and guidelines

assembly x86 x86-64 memory-alignment micro-optimization

JVM first 4 booleans optimized, not 5th

java memory jvm micro-optimization

Is there a difference in performance between the child and descendant selectors?

css performance css-selectors micro-optimization

According to Intel my cache should be 24-way associative though its 12-way, how is that?

performance intel cpu-architecture cpu-cache micro-optimization

Can two instructions execute in the same cycle if the same register is used as input and output respectively?

assembly x86 x86-64 cpu-architecture micro-optimization

How to get lg2 of a number that is 2^k

performance bit-manipulation micro-optimization logarithm bitcount

Why is my operator ++ more than twice as fast as its equivalent instance method?

c# .net-core micro-optimization benchmarkdotnet

_mm256_fmadd_ps is slower than _mm256_mul_ps + _mm256_add_ps?

gcc sse simd avx micro-optimization
« Newer Entries Older Entries »