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New posts in micro-optimization

array_push() vs. $array[] = .... Which is fastest? [duplicate]

php mysql micro-optimization

How expensive is it to convert between int and double?

c++ x86 c++-cli x86-64 micro-optimization

Cycles/cost for L1 Cache hit vs. Register on x86?

performance x86 cpu-architecture cpu-cache micro-optimization

Is performance reduced when executing loops whose uop count is not a multiple of processor width?

performance assembly x86 cpu-architecture micro-optimization

Why date() works twice as fast if we set time zone from code?

php datetime timezone micro-optimization

Why does n++ execute faster than n=n+1?

c micro-optimization optimization performance

Why does breaking the "output dependency" of LZCNT matter?

performance assembly x86 cpu-architecture micro-optimization

'Correct' unsigned integer comparison

c++ c assembly type-conversion micro-optimization

Why are loops always compiled into "do...while" style (tail jump)?

performance loops assembly optimization micro-optimization

Go: multiple len() calls vs performance?

algorithm go micro-optimization

x86_64 best way to reduce 64 bit register to 32 bit retaining zero or non-zero status

assembly x86-64 micro-optimization

Can x86's MOV really be "free"? Why can't I reproduce this at all?

c assembly x86 cpu-architecture micro-optimization

x > -1 vs x >= 0, is there a performance difference

java c++ operators micro-optimization premature-optimization

Why does mulss take only 3 cycles on Haswell, different from Agner's instruction tables? (Unrolling FP loops with multiple accumulators)

c assembly x86 sse micro-optimization

Avoiding the overhead of C# virtual calls

c# virtual-functions micro-optimization

fastest way to negate a number

c++ visual-c++ x86 micro-optimization visual-c++-2012

Passing null pointer to placement new

c++ micro-optimization placement-new noexcept

Does calculating Sqrt(x) as x * InvSqrt(x) make any sense in the Doom 3 BFG code?

c++ optimization micro-optimization math.h

How exactly do partial registers on Haswell/Skylake perform? Writing AL seems to have a false dependency on RAX, and AH is inconsistent

assembly x86 intel cpu-architecture micro-optimization

Why does Intel's compiler prefer NEG+ADD over SUB?

assembly x86 micro-optimization icc
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