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New posts in assembly
What do square brackets mean in x86 assembly?
Sep 05, 2022
assembly
memory
x86
intel-syntax
ENTER and LEAVE in Assembly?
Sep 05, 2022
assembly
x86
stack-frame
The meaning of RET 2 in assembly
Mar 27, 2017
assembly
x86
Unexpectedly poor and weirdly bimodal performance for store loop on Intel Skylake
Oct 07, 2021
performance
assembly
optimization
x86
x86-64
What does the `test` instruction do? [duplicate]
Sep 04, 2022
assembly
x86
How does GCC implement variable-length arrays?
Sep 04, 2022
c
arrays
assembly
gcc
variable-length-array
Graphics driver "hello world" example? [closed]
Sep 21, 2022
c
opengl
assembly
graphics
Using C/inline assembly in C#
Aug 27, 2022
c#
c
assembly
interop
c++ passing arguments by reference and pointer
Sep 04, 2022
c++
performance
assembly
size
arguments
Branch alignment for loops involving micro-coded instructions on Intel SnB-family CPUs
Feb 03, 2022
performance
assembly
x86
intel
micro-optimization
bootloader - switching processor to protected mode
Sep 07, 2022
assembly
operating-system
x86
bootloader
protected-mode
Strange assembly from array 0-initialization
Jan 14, 2018
c++
c
compiler-construction
assembly
Which is a better write barrier on x86: lock+addl or xchgl?
Feb 03, 2022
assembly
x86
memory-barriers
SAR command in X86 assembly with one parameter
May 19, 2022
assembly
x86
disassembly
Calling C functions from x86 assembly language
Sep 04, 2022
c
assembly
x86
What does the R stand for in RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP? [duplicate]
Sep 04, 2022
assembly
x86
x86-64
cpu-registers
cpu-architecture
intel
Relative performance of swap vs compare-and-swap locks on x86
Nov 18, 2022
c
assembly
locking
x86
atomic
Printing out a number in assembly language?
Sep 04, 2022
assembly
x86
real-mode
How to save the registers on x86_64 for an interrupt service routine?
Sep 04, 2022
assembly
x86-64
isr
In MIPS, what are HI and LO
Sep 04, 2022
assembly
mips
cpu-registers
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