In VHDL-2008, how to format "real" similar to "%f" in c-language, example: sprintf(str, "%9.6f", myreal)

Question

I'm using VHDL-2008 and I want to nicely format real numbers are strings similar to this c-language function:

    sprintf(str, "%9.6f", myreal);

Currently, I'm formatting my real numbers this way:

architecture sim of testbench is
    constant myreal :real := 3343.2342;
begin

process
begin
   report real'image(real_number);
   wait;
end process

end architecture;

Which doesn't allow enough control over the formatting of the real numbers in VHDL. What I want, is control over the vhdl formating more like the c-language "%n.mf" formatter.

Basically, the VHDL defaul in GHDL simulator is always to print real numbers in scientific notation with one digit left of the decimal place, a fraction, and an exponent, which is annoying as heck.

Answer 1

VHDL 2008 provides to_string for real in 3 flavours:

function TO_STRING (VALUE: REAL) return STRING;
function TO_STRING (VALUE: REAL; DIGITS: NATURAL) return STRING;
function TO_STRING (VALUE: REAL; FORMAT: STRING) return STRING;

The first case returns the real in a simple format, the 2nd returns it with DIGITS being the number of digits to display to the right of the decimal point, and the 3rd accepts sprintf style format strings from C:

entity real_test is
end entity real_test;

architecture test of real_test is
begin

  process
    variable r : real;
  begin
    r := 3.25432;

    report to_string(r);
    report to_string(r, 3);
    report to_string(r, "%.2f");
    wait;
  end process;

end architecture;

EXECUTION:: NOTE   : 3.25432
EXECUTION:: Time: 0 ps,  Iteration: 0,  Instance: /real_test,  Process: line__7.
EXECUTION:: NOTE   : 3.254
EXECUTION:: Time: 0 ps,  Iteration: 0,  Instance: /real_test,  Process: line__7.
EXECUTION:: NOTE   : 3.25
EXECUTION:: Time: 0 ps,  Iteration: 0,  Instance: /real_test,  Process: line__7.