How to make specific binary from specific object file?

Question

Here is my makefile, i have object files in obj/ directory, and i need to compile them into binaries in bin/ folder, but somehow it doesn't work as i wanted it to work, any ideas?

SOURCES= $(wildcard *.c)
OBJECTS:= $(patsubst %.c, %.o, $(SOURCES))
OBJECTS:= $(addprefix obj/,$(OBJECTS))
NAMES:= $(patsubst %.c, %, $(SOURCES))
NAMES:= $(addprefix bin/,$(NAMES))
CC=gcc
CFLAGS= -Wall -c -o
DIRS = bin obj

all: $(DIRS) $(NAMES)

$(NAMES): $(OBJECTS)
    $(CC) -o $@ $<

obj/%.o: %.c 
    $(CC) $(CFLAGS) $@ $<

$(DIRS):
    mkdir -p $@

clean:
    rm -rf $(DIRS)

Actual output:

mkdir -p bin
mkdir -p obj
gcc -Wall -c -o obj/task1.o task1.c
gcc -Wall -c -o obj/task2.o task2.c
gcc -Wall -c -o obj/task3.o task3.c
gcc -o bin/task1 obj/task1.o
gcc -o bin/task2 obj/task1.o
gcc -o bin/task3 obj/task1.o

Expected output:

mkdir -p bin
mkdir -p obj
gcc -Wall -c -o obj/task1.o task1.c
gcc -Wall -c -o obj/task2.o task2.c
gcc -Wall -c -o obj/task3.o task3.c
gcc -o bin/task1 obj/task1.o
gcc -o bin/task2 obj/task2.o
gcc -o bin/task3 obj/task3.o

Answer 1

In this rule:

$(NAMES): $(OBJECTS)
    $(CC) -o $@ $<

each executable depends on all objects. And since $< grabs only the first prerequisite, all you see is obj/task1.o.

Do it this way:

bin/%: obj/%.o
    $(CC) -o $@ $<

or this way:

$(NAMES): bin/% : obj/%.o
    $(CC) -o $@ $<