I've got the following Makefile:
all: hello.exe hellogtk.exe hellogtktng.cs
hello.exe: hello.cs
gmcs hello.cs
hellogtk.exe: hellogtk.cs
gmcs -pkg:gtk-sharp-2.0 hellogtk.cs
hellogtktng.exe: hellogtktng.cs
gmcs -pkg:gtk-sharp-2.0 hellogtktng.cs
clean:
rm -f *.exe
I'm only starting to learn how to write Makefiles, and I feel that all this is a bit repetitive. How would Makefile pros go about doing this?
all: hello.exe hellogtk.exe hellogtktng.exe
%.exe: %.cs
gmcs -pkg:gtk-sharp-2.0 $<
clean:
rm -f *.exe
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