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How to have dynamic targets in Makefile?

Tags:

makefile

Take a look at this Makefile down below.

compose:
    docker-compose up myapp

compose-shell:
    docker-compose run myapp /bin/bash

compose-shellplus:
    docker-compose run myapp make shell

compose-test:
    docker-compose run myapp make test

compose-migrate:
    docker-compose run myapp make migrate

compose-load:
    docker-compose run myapp make load

compose-export:
    docker-compose run myapp make export

compose-flush:
    docker-compose run myapp make flush

# run tests
test:
    python manage.py test --settings=$(PROJECT_SETTINGS)

# install depedencies (and virtualenv for linux)
install:
ifndef WIN
    -virtualenv -p python3 .venv
endif
    pip install -r requirements.txt

# handle django migrations
migrate:
    python manage.py makemigrations --settings=$(PROJECT_SETTINGS)
    python manage.py migrate --settings=$(PROJECT_SETTINGS)

# handle statics
static:
    python manage.py collectstatic --settings=$(PROJECT_SETTINGS)

shell:
    python manage.py shell_plus --settings=$(PROJECT_SETTINGS)

load:
    python manage.py loaddata db.json --settings=${PROJECT_SETTINGS}

export:
    python manage.py dumpdata --indent 2 --natural-foreign --natural-primary -e sessions -e admin -e contenttypes -e auth.Permission  > db.json --settings=${PROJECT_SETTINGS}

flush:
    python manage.py sqlflush --settings=${PROJECT_SETTINGS}

Is there's more efficient way of doing this?

For example:

compose-${target_name_after_dash}:
    docker-compose run myapp make ${target_name_after_dash}
like image 781
holms Avatar asked Mar 23 '18 13:03

holms


People also ask

What is $< in makefile?

The $@ and $< are called automatic variables. The variable $@ represents the name of the target and $< represents the first prerequisite required to create the output file. For example: hello.o: hello.c hello.h gcc -c $< -o $@ Here, hello.o is the output file.

What are targets in a makefile?

A simple makefile consists of “rules” with the following shape: target … : prerequisites … recipe … … A target is usually the name of a file that is generated by a program; examples of targets are executable or object files.


1 Answers

It's always best to try to find the answer in the documentation before posting on SO. This is one of the most basic things you can do with GNU make.

Use a pattern rule:

compose-%:
        docker-compose run myapp make $*
like image 102
MadScientist Avatar answered Sep 19 '22 10:09

MadScientist