How to define global shell functions in a Makefile?

Question

I want to define a shell function

#!/bin/sh  test () {   do_some_complicated_tests $1 $2;   if something; then     build_thisway $1 $2;   else     build_otherway $1 $2;   fi } 

in such a way that I can use it in every rule of my Makefile, such as:

foo: bar   test foo baz 

To be clear, I want the shell function to be part of the Makefile. What is the most elegant way to do this? Bonus points if you can do it without calling make recursively.

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Background: My actual problem is that make -n produces a very long and unreadable output. Each rule uses almost the same sequence of unreadable shell commands, and there are many rules. The above solution would make the output of make -n more useful.

Answer 1

This solution does not rely on an external temporary file and does not force you to tinker with the SHELL variable.

TESTTOOL=sh -c '\   do_some_complicated_tests $$1 $$2; \   if something; then     build_thisway $$1 $$2;   else     build_otherway $$1 $$2;   fi' TESTTOOL  ifneq (,$(findstring n,$(MAKEFLAGS))) TESTTOOL=: TESTTOOL endif  foo: bar     ${TESTTOOL} foo baz 

The ifneq…endif block checks for the -n flag on the command line and sets the expansion of TESTTOOL to : TESTTOOL which is easy to read and safe to execute.

The best solution could be to turn the shell function into an actual program if this is an option for you.