How GPIO is mapped in memory?

Question

I am recently browsing GPIO driver for pi2, I found user space pi2 GPIO lib (like RPi.GPIO 0.5.11 of python) use /dev/mem for BCM2708 (begins at 0x20000000,and GPIO begins at 0x200000 relatively) to mmap a user space memory region in order to handler GPIO. But I found drivers/gpio in linux source tree is designed to be handled by /sys/class/gpio/*. I found nothing like I/O ports mapping like request_io_region and __io_remap. My question is How GPIO for BCM2708 mapped in memory ? Is there another driver? And can I handle GPIO just by R&W to /sys/class/gpio/*?

Answer 1

I found nothing like I/O ports mapping like request_io_region and __io_remap.

ARM does not have an I/O port space. All peripheral registers are assigned to addresses in memory space.

How GPIO for BCM2708 mapped in memory ?

GPIOs are typically implemented as a peripheral of control registers, and the GPIOs in the BCM2835 of the RPi follows this convention. This set of control register may have a different name; for example Atmel refers to these registers as the Parallel I/O (PIO) peripheral.

Each GPIO (or more accurately each pin) will be represented by one or more bits in each control register function. The control register functions include pin assignment (aka multiplexing), set output to high, set output to low, read pin level, and level and edge detection control.

IOW there is no single bit that can be read and written that corresponds to a GPIO. For a GPIO there would be a bit in a specific register to fetch the input level. There's a bit in another register to set that GPIO output high, and bit in another register to set that GPIO output low.

Is there another driver?

Yes. The pinctrl (pin control) driver is a lower-layer (i.e. closer to the HW) than GPIO. It's the pinctrl layer that handles pin multiplexing (i.e. whether a pin is used for a peripheral function or as a GPIO).
The pinctrl driver for the SoC (e.g. drivers/pinctrl/pinctrl-bcm2835.c) is where you would find devm_ioremap_resources() (which in turn calls devm_request_mem_region() and devm_ioremap()) for the GPIO register block.

And can I handle GPIO just by R&W to /sys/class/gpio/*?

Yes. the sysfs interface is provided for accessing those pins not assigned to peripherals.

ADDENDUM
The sysfs GPIO interface has limited capabilities.
Apparently there are userspace libraries to access additional pin attributes (e.g. enabling pull-up or pull-down resistor) that are normally in the domain of the pinctrl driver. Typically such libraries access the PIO hardware registers directly through the /dev/mem psuedo-file. Be cognizant that such techniques are not secure and could interfere with other device drivers.