How do interrupts work on multicore ARM cpu

Question

This question has already been answered for x86 however, I couldn't find much about ARM MP cpus like Cortex-A9, Cortex-A15 etc...

More importantly i want to know if interrupts can be raised on non-primary cpu without any configuration etc.

I am working on a software which deals only with the primary cpu hence i put the rest in WFI state however I am unaware of how interrupts work on the MP arm cpus, Is it possible that the main cpu continues executing code and one of the secondary cpu picks it up and jumps to the instruction in vector table and execute that code ?

btw here is the code I'm using to put them to low power mode

    uint32_t reg;

    __asm__ volatile("mrc p15, 0, %0, c0, c0, 5" : "=r" (reg));
    reg &= 0xF;

    if(reg > 0)
        goto spin;

<code snipped>

spin:
    for(;;)
        cpu_idle(); // cpu_idle -> wfi

Answer 1

The short and for practical purposes correct answer is that what you ask for is not possible without some configuration being performed on the secondary cores...

The interrupt controller architecture is described (in quite some detail) in http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ihi0048b/index.html

To prepare the secondary cores to receive IPIs, you need to:

• Enable the GIC Distributor (once, for the whole system)
• Enable the GIC CPU interface (for each core)
• Enable the IPIs you want to receive (for each core)
• Set the priorities for each IPI you want to receive (for each core)
• Ensure the CPU interface Interrupt Priority Mask Register (for each core) is set to priority level lower (higher number) than the interrupt priority you set above.
• Clear the CPSR I-bit (for each core)

If you don't intend to implement an interrupt handler, skip the clearing of the I-bit. The core will come out of WFI and continue executing. That is normally what you want for a system boot operation.