How do I substitute a string and add a prefix or suffix in Microsoft NMake?

Question

I am translating a GNU Make makefile to Microsoft Visual Studio Makefile. I have a three doubts:

1) How do I substitute a string. For example in a folder containing:

namespace_type_function1.cpp
namespace_type_function2.cpp
namespace_type_function3.cpp

I want to change type to lets say "INT" string, so I finally get

namespace_INT_function1.cpp
namespace_INT_function2.cpp
namespace_INT_function3.cpp

2) How do I add a prefix in the similar manner 3. How do I add a suffix in the same way.

Answer 1

Once you have the string in either an environment variable or an internal nmake variable, you can use the following to substitute one fixed string for another:

$(MY_VAR:REPLACE_THIS=WITH_THIS)

"WITH_THIS" can be an empty string.

Example makefile:

MY_VAR=123451234512345
ALL:
   @echo $(MY_VAR:12=XX)
   @echo $(MY_VAR:12=)

outputs:

XX345XX345XX345
345345345

From the Microsoft documentation:

Macro substitution is case sensitive and is literal; string1 and string2 cannot invoke macros. Substitution does not modify the original definition. You can substitute text in any predefined macro except $$@.

No spaces or tabs precede the colon; any after the colon are interpreted as literal. If string2 is null, all occurrences of string1 are deleted from the macro's definition string.

Answer 2

NMAKE does not feature much string processing except substring replacement, and even this cannot perform macro expansion. However, since NMAKE supports makefile inclusion, there is an obvious technique you can exploit, albeit its implementation is somewhat complicated.

The idea is to create a temporary makefile which, by being included in a recursive invocation, performs another macro expansion round where needed. This can be used to add variable prefixes, suffixes or separators to lists of strings. Further expansion rounds can be performed likewise if necessary.

The following snippet illustrates the method. It transforms the list a b c d e into [a];[b];[c];[d];[e] (that is, adds a prefix, a suffix and a separator between elements). The original makefile (the rules which would be executed if NMAKE supported secondary expansion) is mostly unchanged. Finally, NMAKE leaves no temporary files behind after the entire run.

# The name of the makefile.
MAKEFILE = test.mak

# The list of strings to be processed. The elements can be separated by one or more spaces or tabs.
LIST = a b c d e

# The prefix to add to each element.
PREFIX = [

# The suffix to add to each element.
SUFFIX = ]

# The separator to add between each element.
SEP = ;

#####

# Replace tabs with spaces.
# Note: there is a hard tab character between the colon and the equal sign.
LIST = $(LIST:  = )

!IFNDEF TEMPFILE
# Write a temporary makefile.
target1 target2:
    @$(MAKE) /nologo /C /$(MAKEFLAGS) /F$(MAKEFILE) TEMPFILE=<< $@
LIST = $(PREFIX)$$(LIST: =$(SUFFIX)$(SEP)$(PREFIX))$(SUFFIX)
LIST = $$(LIST:$(PREFIX)$(SUFFIX)$(SEP)=)
<<NOKEEP

!ELSE
# Here goes your original makefile.
!   INCLUDE $(TEMPFILE)

target1:
    @echo.$@
    @echo.$(LIST)

target2:
    @echo.$@
    @echo.$(LIST)
!ENDIF

The only caveat from this is that command-line macros are not passed to recursive invocations, and thus not much useful anymore.