How can I define #define in my Make files

Question

In my c/c++ files, there are multiple #define. As an example:

#ifdef LIBVNCSERVER_HAVE_LIBZ
  /* some code */
#ifdef LIBVNCSERVER_HAVE_LIBJPEG
  /* some more code */

Can you please tell me how can I modify my Makefile.in so that I have those #define in ALL files during compilation?

Thank you.

Answer 1

-DLIBVNCSERVER_HAVE_LIBZ -DLIBVNCSERVER_HAVE_LIBJPEG

You could pass those in CPPFLAGS,

CPPFLAGS = -DLIBVNCSERVER_HAVE_LIBZ -DLIBVNCSERVER_HAVE_LIBJPEG

or make new variable

CUSTOMDEFINES = -DLIBVNCSERVER_HAVE_LIBZ -DLIBVNCSERVER_HAVE_LIBJPEG

and pass it to CPPFLAGS = -DEXISTINGFLAGS $(CUSTOMDEFINES)

Those are finally will pass to gcc/g++ -D...

$(CC) $(CPPFLAGS)