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hard interrupt and softirq

In linux, when net card receive a packet, would trigger a hard interrupt, and then in the interrupt call back function, it will raise a NET_RX_SOFTIRQ, would this softirq run at the same cpu with hard irq?

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wartalker Avatar asked Mar 30 '16 08:03

wartalker


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Can Softirq be interrupted?

Softirqs run at a high priority (though with an interesting exception, described below), but with hardware interrupts enabled. They thus will normally preempt any work except the response to a "real" hardware interrupt.

What is Softirq and Hardirq?

This means that the same code can be used inside an hard irq handler (where interrupts are already off) and in softirqs (where the irq disabling is required). Note that softirqs (and hence tasklets and timers) are run on return from hardware interrupts, so spin_lock_irq() also stops these.

What are hard & soft interrupts?

1. Hardware interrupt is an interrupt generated from an external device or hardware. Software interrupt is the interrupt that is generated by any internal system of the computer. 2.

What causes high Softirq?

softIRQ CPU usage is a direct result of kernel interrupt activity. If you observe high softIRQ CPU usage on a system running a Check Point security application (ie. VPN-1 NGX, VSX NGX, etc.), Crossbeam highly recommends consulting the following SK article published by Check Point support.


1 Answers

An interrupt request (IRQ) is a request for service, sent at the hardware level. Interrupts can be sent by either a dedicated hardware line, or across a hardware bus as an information packet (a Message Signaled Interrupt, or MSI). When interrupts are enabled, receipt of an IRQ prompts a switch to interrupt context. Kernel interrupt dispatch code retrieves the IRQ number and its associated list of registered Interrupt Service Routines (ISRs), and calls each ISR in turn. The ISR acknowledges the interrupt and ignores redundant interrupts from the same IRQ, then queues a deferred handler to finish processing the interrupt and stop the ISR from ignoring future interrupts.

IRQs have an associated "affinity" property, smp_affinity, which defines the CPU cores that are allowed to execute the ISR for that IRQ. This property can be used to improve application performance by assigning both interrupt affinity and the application's thread affinity to one or more specific CPU cores. This allows cache line sharing between the specified interrupt and application threads.

# cat /proc/irq/32/smp_affinity 
  f

The default value for smp_affinity is f, meaning that the IRQ can be serviced on any of the CPUs in the system. Setting this value to 1, as follows, means that only CPU 0 can service this interrupt:

# echo 1 >/proc/irq/32/smp_affinity
# cat /proc/irq/32/smp_affinity
  1

On systems that support interrupt steering, modifying the smp_affinity of an IRQ sets up the hardware so that the decision to service an interrupt with a particular CPU is made at the hardware level, with no intervention from the kernel.

More detailed information present at Redhat's DOC - 4.3 Interrupts and IRQ tuning

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OmPS Avatar answered Oct 04 '22 01:10

OmPS