How to pass the entire command line (including goals, link lines, make options etc) from top level make to recursive make:
targets : prerequisites
$(MAKE) $(this should expand to top level command line) additional_args
Thanks.
I think the closest you can get is using a combination of $(MAKE)
, which contains the exact filename make was invoked with, $(MAKECMDGOALS)
, which contains the goals you specified on the command line, and $(MAKEFLAGS)
, which contains any variable definitions and (a subset of) the switches specified on the command line.
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