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Does unaligned memory access always cause bus errors?

According to the Wikipedia page Segmentation fault, a bus error can be caused by unaligned memory access. The article gives an example about how to trigger a bus error. In the example, we have to enable alignment checking to see the bus error. What if we disable such alignment checking?

The program seems to work properly. I have a program access unaligned memory frequently, and it is used by quite a few people, but no one reports bus errors or other weird results to me. If we disable alignment checking, what is the side effect of unaligned memory?

Platforms: I am working on x86/x86-64. I also tried my program by compiling it with "gcc -arch ppc" on a Mac and it works properly.

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user172818 Avatar asked Sep 30 '09 08:09

user172818


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What is unaligned memory access?

Unaligned memory accesses occur when you try to read N bytes of data starting from an address that is not evenly divisible by N (i.e. addr % N != 0). For example, reading 4 bytes of data from address 0x10004 is fine, but reading 4 bytes of data from address 0x10005 would be an unaligned memory access.

How important is memory alignment?

The CPU can operate on an aligned word of memory atomically, meaning that no other instruction can interrupt that operation. This is critical to the correct operation of many lock-free data structures and other concurrency paradigms.

What is the difference between word aligned access and unaligned access of data in memory?

Unaligned memory access is the access of data with a size of N number of bytes from an address that is not evenly divisible by the number of bytes N. If the address is evenly divisible by N, we have aligned memory access.

What is the aligned and unaligned concept?

ALIGNED: One byte for each group of 8 bits (or part thereof) UNALIGNED: As many bits as are required, regardless of byte boundaries. ALIGNED: CEIL(n/8) UNALIGNED: n bits. Byte (Data can begin on any byte, 0 through 7)


1 Answers

It very much depends on the chip architecture. x86 and POWER are very forgiving, Sparc, Itanium and VAX throw different exceptions.

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James Anderson Avatar answered Sep 21 '22 11:09

James Anderson