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There are two popular ways of coding a state machine in VHDL: one process or two processes. There are rumors (and it is taught in some colleges) that two processes might result in better hardware. Does anybody have any hard evidence for this? My own preliminary tests show that there is no difference at all.
I'm looking for reproducible experiments: VHDL code for the two coding styles, and specifics on how to synthesize them (which tool, which parameters).
Please help me to either debunk or confirm the myth that two processes result in better synthesized hardware.
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Synthesizers don't physically create those vibrations with hammers or anything like that. Instead, an electrical signal passes through a signal path to an amplifier. The amplifier then sends the signal through a speaker to create vibrations in the air that we hear as sound.
In many people's minds, synthesizers can be divided into two categories: analog and digital.
The biggest disadvantage of software synths is that you need a computer to use them. This is a disadvantage for a few reasons. First of all, your computer will become outdated over time. This is because software is continuously developed to the specifications of both the latest and most available computer components.
Synthesizers are used for the composition of electronic music and in live performance. The intricate apparatus of the sound synthesizer generates wave forms and then subjects them to alteration in intensity, duration, frequency, and timbre, as selected by the composer or musician.
A lot of this kind of "knowledge" is based on the tools that were around 20 years ago. Things have moved on.
That's not to say that it's everything has been fixed in all cases, but you're doing the right thing by actually performing trials.
Other things which have been avoided in the past are:
wait rather than the sensitivity list. This one is particularly crazy because if you read the VHDL spec it says the two are equivalent and should be implemented in the same way.
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Sorry, no reproducible experiment, but I'd be staggered if a synthesizer cared (at least these days - I have no hard evidence though)! Surely it just parses the VHDL down to a bunch of logic feeding a bunch of flipflops.
I don't even know if it used to be a problem with old-fashioned synthesizers or whether people just assumed it to be so!
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