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What is the difference between Cache and Translation LookAside Buffer [TLB] ?
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A translation lookaside buffer (TLB) is a memory cache that stores the recent translations of virtual memory to physical memory. It is used to reduce the time taken to access a user memory location. It can be called an address-translation cache.
Cache stores the actual contents of the memory. TLB on the other hand, stores only mapping. TLB speeds up the process of locating the operands in the memory. Cache speeds up the process of reading those operands by copying them to a faster physical memory.
This means that as long as a translation can be found in the TLB, a virtual access executes just as fast as a physical access. Indeed, modern CPUs often execute faster in virtual memory because the TLB entries indicate whether it is safe to access memory speculatively (e.g., to prefetch instructions).
The first level of caching for the translation table information is an L1 TLB, implemented on each of the instruction and data sides.
Cache stores the actual contents of the memory.
TLB on the other hand, stores only mapping. TLB speeds up the process of locating the operands in the memory.
Cache speeds up the process of reading those operands by copying them to a faster physical memory.
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From Wiki:
In computer science, a cache (pronounced /kæʃ/, kash) is a collection of data duplicating original values stored elsewhere or computed earlier, where the original data is expensive to fetch (owing to longer access time) or to compute, compared to the cost of reading the cache. In other words, a cache operates as a temporary storage area where frequently accessed data can be stored for rapid access. Once the data is stored in the cache, it can be used in the future by accessing the cached copy rather than re-fetching or recomputing the original data.
whereas
A Translation lookaside buffer(TLB) is a CPU cache that memory management hardware uses to improve virtual address translation speed. It was the first cache introduced in processors. All current desktop and server processors (such as x86) use a TLB. A TLB has a fixed number of slots that contain page table entries, which map virtual addresses to physical addresses. It is typically a content-addressable memory (CAM), in which the search key is the virtual address and the search result is a physical address.
Also have a look at this.
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