How to decrease the number of possible cache misses when designing a C++ program?
Does inlining functions help every time? or is it good only when the program is CPU-bounded (i.e. the program is computation oriented not I/O oriented)?
Let's take a look at some other techniques for reducing the miss penalty. This technique is used with write-through or write-back. The idea is not to make the CPU wait for the write to complete in memory. Instead, data is written to a write buffer, and the processor can continuef while it is being written to memory.
Reducing Cache Miss Penalty In conjunction with early restart , this reduces the miss penalty by allowing the CPU to continue execution while most of the block is still being fetched.
The worst cache miss rate occurs when there is no tiling, but the worst CPI occurs with tile size 288 × 288. CPI improves slightly when tiling is discontinued. This is likely due to lower instruction CPI that results from the reduction of executed branch instructions from needing fewer iterations of the tile loops.
Cache size and miss rates The cache size also has a significant impact on performance. — The larger a cache is, the less chance there will be of a conflict. — Again this means the miss rate decreases, so the AMAT and number of memory stall cycles also decrease.
Here are some things that I like consider when working on this kind of code.
For data bound operations
use arrays & vectors over lists,maps & sets
process by rows over columns
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