Menu
I am writing a Makefile, and I want to use a generic rule with wildcards, like
%: bkp/% cp $< $@ But I wanted this rule to be valid only for a few specific files. I wanted to define a variable with the list, for example
file_list = foo.c bar.c zzz.c
and configure the rule so it is only valid for files that are listed in this variable. How do I do that?
420
$(CC) $(CFLAGS) -I$(LIB_PATH) -L$(LIB_PATH) -o $(PROGRAM) main. c -l$(LIB) `pkg-config ...` Basically, you need set the include path to the . h file with -I, then -L for the lib path and -l to set the lib name.
$@ is the name of the target being generated, and $< the first prerequisite (usually a source file). You can find a list of all these special variables in the GNU Make manual.
A rule appears in the makefile and says when and how to remake certain files, called the rule's targets (most often only one per rule). It lists the other files that are the prerequisites of the target, and the recipe to use to create or update the target.
A pattern rule looks like an ordinary rule, except that its target contains the character ' % ' (exactly one of them). The target is considered a pattern for matching file names; the ' % ' can match any nonempty substring, while other characters match only themselves.
You want a static pattern rule:
file_list = foo.c bar.c zzz.c $(file_list): %: bkp/% cp $< $@ The syntax is very similar to the implicit pattern rule you were using. And yes, it's generally safer (more predictable).
80
If you love us? You can donate to us via Paypal or buy me a coffee so we can maintain and grow! Thank you!
Donate Us With
