I have a GNU Makefile that looks a bit like this:
LIST = item1
.PHONY: targetMain targetA targetB preA preB
targetMain:
# DO all the work in here
echo $(LIST)
targetA: preA targetMain
targetB: preB targetMain
preA:
LIST += itemA
preB:
LIST += itemB
The idea is that I either run make targetA or make targetB. Both of them do a very similar thing, but with a different list of items. The problem is that the variable isn't conditionally appended to, it is always appended to, meaning my output is always "item1 itemA itemB".
How can I conditionally append to a variable?
The file name of the target of the rule. If the target is an archive member, then ' $@ ' is the name of the archive file. In a pattern rule that has multiple targets (see Introduction to Pattern Rules), ' $@ ' is the name of whichever target caused the rule's recipe to be run.
+= Append the value to the current value of the variable. ?= Assign the value to the variable if it is not already defined. := Assign with expansion, i.e. expand the value before assigning it to the variable. Normally, expansion is not done until the vari- able is referenced.
A variable is a name defined in a makefile to represent a string of text, called the variable's value. These values are substituted by explicit request into targets, prerequisites, commands, and other parts of the makefile. (In some other versions of make , variables are called macros.)
LIST = item1
.PHONY: targetMain targetA targetB
targetMain:
# DO all the work in here
echo $(LIST)
targetA: LIST+=itemA
targetB: LIST+=itemB
targetA targetB: targetMain
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