Computing Makefile variable on assignment

Question

In a Makefile, I'm trying to assign the result of a shell command to a variable:

TMP=`mktemp -d /tmp/.XXXXX`

all:
    echo $(TMP)
    echo $(TMP)

but

$ make Makefile all

is echoing 2 different values, eg:

/tmp/.gLpm1T
/tmp/.aR4cDi

What is the syntax for mktemp to be computed on variable assignment?

Thank you.

Answer 1

It depends on the flavour of make. With GNU Make, you can use := instead of = as in

TMP:=$(shell mktemp -d /tmp/.XXXXX)

Edit As pointed out by Novelocrat, the = assignment differs from := assignment in that values assigned using = will be evaluated during substitution (and thus, each time, the variable is used), whereas := assigned variables will have their values evaluated only once (during assignment), and hence, the values are fixed after that. See the documentation of GNU Make for a more detailed explanation.

In order for the value to be truly constant after assignment, though, it should not contain any parts, which might be special to the shell (which make calls in order to actually run the update rules, etc.) In particular, backticks are best avoided. Instead, use GNU make's built-in shell function and similar to achieve your goals.

Answer 2

If you’re using GNU Make, instead of using backticks, use $(shell ...). For example,

TMP=$(shell mktemp -d /tmp/.XXXXX)