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Clarification on Ethernet, MII, SGMII, RGMII and PHY

I primarily come from an Embedded Software background and hence I have very limited knowledge about hardware in general. I always use to think Ethernet as that little physical connector on your computer into which you attach your Ethernet cable. And from a Software perspective all you need to do is to install the driver (in Windows) or configure the Linux kernel to include the driver for your Ethernet.

Questions:

But as I have started going down one level (towards the hardware) and looking at various datasheet and schematics, I have started to come across terms like PHY, MII, SGMII, RGMII, etc. And now I am little confused as to what constitutes an Ethernet? For example, when I say Intel 82574L 1.0 Gbps Ethernet port, where do all these terms fit in?

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modest Avatar asked Apr 03 '13 01:04

modest


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What is SGMII vs RGMII?

GMII and RGMII operate at 125 megahertz and SGMII operates at 625 megahertz. The important difference between RGMII and GMII is the pin count. Although RGMII has half the pins of GMII, it can still operate at gigabit speeds using the same clock frequency.

What is MII and RMII in Ethernet?

The Ethernet standard (IEEE 802.3u) defines the MII with 16 pins per port for data and control (8 data and 8 control). The RMII specification reduces the data interfaces from 4-bit (nibble) data to 2-bit (di-bit) data. In addition control is reduced to 3 signals (one of which is optional) and one clock).

What is RGMII in Ethernet?

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What is SGMII in Ethernet?

The serial gigabit media-independent interface (SGMII) is the interface with the lowest pin count available for connecting compatible MACs and PHYs. It consists of pairs of Txdata, Rxdata, and Rx Ref Clk data pins.


2 Answers

Some definitions:

  • MAC - media access controller. This is the part of the system which converts a packet from the OS into a stream of bytes to be put on the wire (or fibre). Often interfaces to the host processor over something like PCI Express (for example).
  • PHY - physical layer - converts a stream of bytes from the MAC into signals on one or more wires or fibres.
  • MII - media independent interface. Just a standard set of pins between the MAC and the PHY, so that the MAC doesn't have to know or care what the physical medium is, and the PHY doesn't have to know or care how the host processor interface looks.

The MII was standardised a long time ago and supports 100Mbit/sec speeds. A version using less pins is also available, RMII ('R' for reduced).

For gigabit speeds, the GMII ('G' for gigabit) interface is used, with a reduced pincount version called RGMII. A very reduced pincount version called SGMII is also available ('S' for serial) which requires special capabilities on the IO pins of the MAC, whereas the other xMIIs are relatively conventional logic signals.

There are also many more varieties of interfaces used in other circumstances, may of which are linked to from the Wikipedia MII page:

http://en.wikipedia.org/wiki/Media_Independent_Interface

Regarding your specific Intel chip question - as far as I can tell (the datasheet link seems dead), that chip is a MAC, with PCIe. So it will sit between the PCIe bus on the host and some kind of gigabit physical layer (PHY).

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Martin Thompson Avatar answered Sep 22 '22 07:09

Martin Thompson


Let me try to explain:

  1. The MII, SGMII, RGMII are three kinds of interface between the MAC block and the PHY chip. The Intel 82574L is one MAC chip. Looking following figure:

    _______         __________                  ___________  CPU  | PCI-E   |        |  MII/SGMII/RGMII |         |  or   |<=======>| MAC    |<================>| PHY     |<====>physical interface   board| or else |        |                  |         | _______         __________                  ___________ 

    For details about MII (100Mbps), SGMII (1Gbps, serial), RGMII (1Gbps, reduced) definition, you can google them.

  2. Basically speaking, NIC (Network Interface Card) consist of one MAC block and related PHY chip, and other peripheral modules. And also one Ethernet device driver should work with the NIC hardware. The MAC block has one interface with the control CPU or PC main-board, such as PCIe bus or else.

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tian_yufeng Avatar answered Sep 21 '22 07:09

tian_yufeng