Best way to approach FPGA Device Requirements

Question

When designing FPGA systems how can I estimate roughly the number of logic blocks a given task would require?

Anyone have a rough order of magnitude on what I should expect for these comon devices?:

• UART
• packet deframer with CRC32
• 8 micro core

I've seen www.opencores.org, however, they are not giving a number of gates magnitude for each project.

Answer 1

I'd recommend going to Opencores.org, finding a design similar to yours and synthesizing it. I'd say that's the most accurate way to estimate logic utilization.