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I am kind of stuck here. We have two makefiles (A requirement that I can't change)
C_FILES = c/src/main/rule_main.c rule_main_OPTIONAL_FLAG = +w127 rule_main_DEBUG = TRUE
Makefile: It contains all the rules.Now I want to add a facility so that I can define file specific flags (and optional file specific debug flag) as in:
CUSTOM_DEBUG_FLAG = $($(basename $(notdir $@))_DEBUG) ## rule_main_DEBUG macro from defs.mk
ifeq ($(CUSTOM_DEBUG_FLAG),TRUE)
do something
endif
But this is not working since expansion of automatic variables is not supported within conditionals. Is there any other way to do it?
209
What you do is use a special feature of make , the automatic variables. These variables have values computed afresh for each rule that is executed, based on the target and prerequisites of the rule. In this example, you would use ' $@ ' for the object file name and ' $< ' for the source file name.
Check if variable is defined in a Makefilecheck_defined = \ $(strip $(foreach 1,$1, \ $(call __check_defined,$1,$(strip $(value 2))))) __check_defined = \ $(if $(value $1),, \ $(error Undefined $1$(if $2, ($2)))) install: $(call check_defined, var1) $(call check_defined, var2) # do stuff here..
Variables defined with ' = ' are recursively expanded variables. Variables defined with ' := ' or ' ::= ' are simply expanded variables; these definitions can contain variable references which will be expanded before the definition is made.
I usually take advantage of conditional functions:
SPECIFIC_FLAGS=$(if $(findstring $(CUSTOM_FLAG),TRUE),$(IF_TRUE),$(IF_FALSE))
Or use call function to define my own function:
debug_defs=$(if $(findstring $(1),file1 file2),-DDEBUG,-DNDEBUG)
%.o: src/$$(notdir %).c
@cc -c $(CFLAGS) $(call debug_defs,$(notdir $(basename $@))
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