By default, does SystemVerilog pass arrays by value or reference?
For example:
int array[5] = '{0,1,2,3,4};
some_function(array); // <-- value or reference?
Since an array is passed as a pointer, the array's memory is not copied. The function uses the memory of the same array that is passed to it, and can change what is in that memory. Because arrays are already pointers, there is usually no reason to pass an array explicitly by reference.
Passing by reference means that the method which gets the parameter is able to change the variable such that the original variable is also changed. Passing by value means that a copy of the value is passed, and any change to that copy does not reflect back on the original variable.
Static ArraysA static array is one whose size is known before compilation time. In the example shown below, a static array of 8-bit wide is declared, assigned some value and iterated over to print its value. Static arrays are further categorized into packed and unpacked arrays.
Replies. Yes you can, but you must use a typedef to define the return type.
By default, SystemVerilog passes arrays by value, copying the entire array.
It is recommended to pass arrays by reference whenever possible for performance reasons.
ref
.const ref
.Example:
function void pass_by_value(int array[5], int queue[$], int assoc[int]);
// Default.
// A copy of the arrays is made in this function
endfunction
function void pass_by_ref(ref int array[5], ref int queue[$],
ref int assoc[int]);
// Original arrays are being referenced
endfunction
function void pass_by_const_ref(const ref int array[5],
const ref int queue[$],
const ref int assoc[int]);
// Original arrays are being referenced
// And they can be read but cannot be modified in this function
endfunction
Example on EDA Playground: http://www.edaplayground.com/x/2m9
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