verilog: how do I add parameters

Question

I want to have parameterized module. It has the following definition:

module example (...);
    parameter A = 2;
    parameter B = 2;
    parameter C = A + B;

endmodule

However, when I print out the parameter values, I get A = 2, B = 2, and C = 1... Any ideas why?

Answer 1

Found a solution - use localparam.

module example (...);
  parameter A = 2;
  parameter B = 2;
  localparam C = A + B;

endmodule