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New posts in assembly
Floating point assembly on intel processor
Jul 06, 2026
assembly
x86
reverse-engineering
fpu
x87
virtual method wrong (0x0) address
Jul 06, 2026
c++
assembly
gdb
cpu-registers
vtable
Forcing integer constant to be quadword
Jul 05, 2026
c
assembly
x86-64
Why do x86 mul and div instructions only take a source operand?
Jul 05, 2026
assembly
x86
x86-64
instruction-set
instructions
Beeping Bootloader (Intel x86)
Jul 05, 2026
assembly
nasm
x86-16
bootloader
bios
Why does this PowerPC instruction sequence appear to be setting both cr0 and cr1?
Jul 04, 2026
assembly
powerpc
What is the purpose of this function in assembly?
Jul 05, 2026
c
assembly
x86-64
DWARF - How to find the prologue end/epilogue start addresses of functions in a given binary?
Jul 04, 2026
c
assembly
objdump
dwarf
readelf
Can protection mode be turned off with inline assembly?
Jul 04, 2026
linux
assembly
linux-kernel
kernel
inline-assembly
GCC - Function inlining, LTO and optimizations
Jul 03, 2026
assembly
gcc
compiler-optimization
microbenchmark
inlining
Where can I find programs for practicing C and assembler(IA32)?
Jul 04, 2026
c
linux
assembly
ubuntu
x86
What is the definition of instruction set architecture?
Jul 03, 2026
assembly
cpu-architecture
instruction-set
Why is it better to use the ebp than the esp register to locate parameters on the stack?
Jul 03, 2026
assembly
x86
cpu-architecture
stack-memory
stack-frame
using text macros @date or @time in MASM x86
Jul 03, 2026
assembly
x86
masm
masm32
storing a value into a data segment in MIPS
Jul 02, 2026
assembly
mips
BIOS and DOS interrupts (16H and 21H)
Jul 01, 2026
assembly
bios
keyboardinterrupt
AVR Assembler in Linux
Jul 02, 2026
linux
eclipse
assembly
avr
How to check aes-ni are supported by CPU?
Jul 01, 2026
c
assembly
aes
aes-ni
Rex prefix decoding for intel x64 arch
Jul 01, 2026
assembly
x86-64
intel
opcode
machine-code
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