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Explanation of assembly code

I have started to learn assembly. I came across these lines.

;*************************************************;
; Second Stage Loader Entry Point
;************************************************;

main:
   cli  ; clear interrupts
   push cs ; Insure DS=CS
   pop ds

Here on second line of code, the code segment is push to the stack(I think this). I have seen it in many codes. Why we should do this and how it ensures DS =CS? On third line DS is pop out of stack(I think this). Why it is done? It is pop out of stack means it was push to stack before. There is no code for that. Can anybody explain all this to me? Thanks in advance.

like image 572
narayanpatra Avatar asked Apr 17 '26 02:04

narayanpatra


1 Answers

It's not the push cs that ensures this, it's the push cs; pop ds; combination that does.

The first instruction copies the current value of cs onto the stack, and the second pulls that value off the stack and puts it into the ds register.


In response to your request for more information, let's start with the following stack and registers:

stack=[1,2,3], cs=7, ds=6

After push cs, which pushes the value of the cs register onto the stack:

stack=[1,2,3,7], cs=7, ds=6

After pop ds, which pops a value off the stack and put it into the ds register:

stack=[1,2,3], cs=7, ds=7

And that's basically it.


I can't recall of the top of my head whether it was possible to transfer between segment registers with a mov instruction (I don't think it was, but I may be wrong, and this would necessitate the push/pop sequence). Intel's manual confirms that: there is no mov option with a segment register as both source and destination, only mov r/m, Sreg and mov Sreg, r/m.

But even if it were, assembler coders often chose more suitable instructions, either for speed or compact code (or both), things like using xor ax, ax instead of mov ax, 0 for example.

push cs and pop ds are both 1-byte instructions. mov ax, cs / mov ds, ax are each 2-byte instructions (and do exist, supported in all x86 CPUs). In a bootloader, code-size is more important than speed, especially for instructions that only run once. In other cases, like normal functions that run in real mode, you would more likely use a register as a temporary instead of slower but smaller push/pop.

(If mov ds, cs existed and was only 2 bytes, it would be worth using since it would be simpler. But 8086 didn't spend any of its opcodes on that, and no later CPU added it as an extension.)

In an MBR boot sector, it's safe to assume that SS:SP points at usable stack space with room for at least a few words to push and pop, and for interrupt handling. So using only registers (AX as a temporary instead of stack space) isn't an advantage for correctness.

like image 187
paxdiablo Avatar answered Apr 21 '26 02:04

paxdiablo