Why is the reset handler located at 0x0 for Cortex-A but not for Cortex-M3

Question

What is the reason Cortex-M3 has the initial stack pointer value located at 0x0, and reset handler located at 0x4? What is the design justification for this?

Why couldn't the ARM guys leave 0x0 to the reset handler like they do for Cortex-A, then initialize SP inside the reset handler?

Answer 1

I think this one falls under the "it's not a bug, it's a feature" banner.

The ARM architecture M (microcontroller) profile has a completely different exception model to the A and the R profiles. The A-profile (like the R-profile) retain backwards compatibility with previous ARM processors. The M-profile was permitted to deviate from this, and so was designed to be easier to program completely from C/C++ (without asm).

Thus vector entries containing addresses rather than instructions, and once you've done that, why not set the SP in the same way? It also does automatic state saving on exception entry.