prl questions

prl answers

• Program counter, fences and processor re-ordering
• Does the VMX mode have the capability to detect previously non-trappable sensitive instructions?
• Precise details of writing a byte into PCIe address space from CPU
• When are TLP packets created in a memory mapped PCIe configuration?
• iretq throwing GP fault
• I don't understand what's going on with SBC
• Will an implicit stack switch occur when switching from compatibility mode to 64-bit mode at the same privilege level?
• Will pushf and popf cause VMEXIT in virtual machine on x86 platform?
• Basic buffer overflow tutorial
• How is CR8 register used to prioritize interrupts in an x86-64 CPU?