Marty

Marty has asked 7 questions and find answers to 23 problems.

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About

I'm an IC Digital Design Engineer working in Ireland. I code:

RTL in verilog
Testbenches in verilog or systemverilog, with a sprinkling of DPI'd C routines for good measure
Various scripts in Python, bash and if I have to, Perl

In my spare time, I dabble in PIC and Arduino projects. I've also been known to write tiny GUI programs with Python&[wxPython|pyGTK]

Marty questions

Why does ncurses fail when I reload a dynamic library?
How can I prevent database being written to again when the browser does a reload/back?
How do I find the nearest prime number?
Why can't I increment this `std_logic_vector`
How do I sum the columns in 2D list?

Marty answers

Shift Registers Verilog
combinatorial hardware multiplication in verilog
compute results and mux or not
verilog modelsim fpga
Verilog: is it possible to do indexed instantiation?
Syntax for using an array of wires as input
Verilog to GDSII compiler (open-source)
Why is my D Flip Flop not waiting for the positive edge of the clock?
Arduino: Is the command Serial.print("some string text") occupying SRAM?
Verilog: Can you put "assign" statements within always@ or begin/end statements?