Makefile define: recursive expansion question

Question

In a makefile, I define a variable using the define directive. This variable will hold a configurable list of commands that I want to execute.

I would like this variable to get a list of files (.foo files, for example). These files are created during the makefile execution. For example makefile:

MY_VAR = $(wildcard *.foo)
define MY_VAR2
    echo $(1) $(MY_VAR)
endef

foo: create_files
    $(call MY_VAR2, ls)
    rm -f *.foo

create_files:
    touch foo.foo
    touch bar.foo

I do not get the desired results. It appears that MY_VAR2 is evaluated upon declaration.

Is there a way to get the desired behavior?

---

edit:

The $(shell) command, as sateesh correctly pointed out, works for the example above. However, it does not work for the example below. The main difference in this example is that the new files are created inside MY_VAR2.

MY_VAR = $(wildcard *.foo) 
TEST_VAR = $(shell ls *.foo)

define MY_VAR2 
    @touch foo.foo
    @touch bar.foo
    @echo "MY_VAR" $(1) $(MY_VAR)
    @echo "TEST_VAR" $(1) $(TEST_VAR)
endef 

foo:
    $(call MY_VAR2, ls) 
    @rm -f *.foo 

I can solve the above by adding rules. Is there a simpler method?

Answer 1

It looks to me like you are abusing make, trying to write a shell script in make.

If you write a shell script, write a shell script. You execute your commands in sequence, and you are able to know what files are present when executing each line.

touch foo.foo
touch bar.foo
your-command `ls *.foo`

On the other side, if you want to make usage of make, then have rules and dependencies, you won't even have to use define if you go the make way of thinking.

foo: create_files
    your-command $(wildcard *.foo)
    rm -f *.foo

create_files:
    touch foo.foo
    touch bar.foo