Is "muli" a MIPS instruction? Where is it defined?

Question

I have the following MIPS code (for swapping adjacent elements from an array) from a class slide:

muli $2, $5,4
add  $2, $4,$2
lw $15, 0($2)
lw $16, 4($2)
sw $16, 0($2)
sw $15, 4($2)
jr $31

This exact code will come up via google, so it must be a sort of standard example used in various colleges.

I understand all of it; in class I assumed "muli" was multiply immediate. (Editor's note: multiply by a power of 2 is best done with a left shift like sll $2, $5, 2, never a multiply. No compiler would ever emit this, and you'd only write this way by hand to dumb down the array indexing for this swap function.)

Now it appears "muli" is not a command at all (at least I don't see it on any of my references).

What am I missing? I apologize if this is a dumb question but it is stumping me.

Answer 1

By the way, in case anyone else ever comes searching for this same question, I found something after a long search.

This is from an errata sheet for the previous edition of the textbook:

. . . 12 There is no pseudoinstruction for MIPS with the mnemonic "muli" as listed in the middle of Figure 1.3. . . .

So...it's a typo in the book. Mystery solved. Yay!

Answer 2

Your original MIPS code is a simple swap of adjacent values from an index k inside an array. It implements this C:

swap(int v[] , int k)
{  
    int temp;
    temp = v[k];
    v[k] = v[k+1];
    v[k+1] = temp;
}

Your code is using the non-existent muli as an immediate multiply by 4, instead of sll $2, $5, 2, as part of array indexing for 4-byte words.

Explanation of Original MIPS code:

1. k = $5
2. Base address of v = $4
3. Address of v[k] = $4(base address of array v) + (sizeof integer)4*$5(index k)
4. (muli) $2 = 4*$5
5. (add) $2 = $4 + $2
6. (Now $2 stores address of v[k])

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Some other ISAs do have an immediate multiply, for example PowerPC.
According to IBM Knowledge Center muli and mulli are same instructions on PowerPC/POWER.

muli RT, RA, SI            # PowerPC instruction, not MIPS

This instruction multiplies RA register source and the SI signed immediate, putting the result into RT, the target register.