Intel Hex File Extended Segment Address and Extended Linear Address

Question

I'm writing an Intel Hex file reader for the application I am currently working on.

One thing I am unclear on in the Intel Hex File spec (http://microsym.com/editor/assets/intelhex.pdf) is what to do if a hex file has an Extended Segment Address and an Extended Linear Address. Is a file with both of those records (02 and 04) legal, or should it be rejected?

If it is legal, how is this handled? When reading in an extended segment address should the extended linear address be cleared (and vice-versa) or should they be combined somehow?

Thank You.

Answer 1

I have ran across this being handled in the source code of Microchip's AN1388

In WriteHexRecord2Flash() of Framework.c it looks like they add the two offsets derived from 02 and 04 records. I'm not saying that this is the correct way of doing things, but it has been the only thing that I have ran into so far that addresses this.

The specification does not seem to specify what to do in this situation.